Error correction codes are often employed in a memory device for detecting and correcting data bit errors in data stored in the memory device. Generally, the number of data bit errors detectable and correctable in the data increases with an increasing number of error bits in the error correction code. In many memory devices, data is stored in a memory location of the memory device along with the error correction code for the data. In this way, the data and the error correction code may be written to the memory location in a single write memory operation and read from the memory location in a single read memory operation.
A flash storage typically has data blocks for storing data. Each of these storage blocks includes a number of memory pages identified by page number. The lowest page number of a memory page in a storage block of the flash storage is page 0, and the remaining memory pages in the storage block are identified by a sequence of higher page numbers. In this type of flash storage, data is stored in a memory page of a storage block along with the error correction code for the data.
In some types of NAND flash storage, the bit-error-rate for data stored in a storage block varies among the memory pages of the storage block. Generally, memory pages having a higher page number have a higher bit-error rate than memory pages having a lower page number. As a result of this anomaly in NAND flash storage, memory pages having higher page numbers in NAND flash storage have a higher occurrence of data bits errors than memory pages having lower page numbers in the NAND flash storage.